Intel unveils new packaging technology

Intel says it has developed new packaging technology to suit its emerging range of tiny, high-performance processors.

The company is set to show off the process, called Bumpless Build-Up Layer packaging, at a conference in Montreal.

Packaging is a critical element of semiconductor technology, especially as demand increases for powerful mobile computing devices.

Gerald Marcyk, director of Intel's Components Research Laboratory, says: "We need to make sure the performance of a microprocessor engine is matched with the performance of packaging."

The new process embeds silicon in the package core - removing the need for soldering.

This, the company says, cuts the depth of the entire package in half, delivering higher performance and lower power consumption.

Mr Marcyk says the changes will eventually lead to the production of chips that can process images and speech as quickly as words and numbers are processed today.

Intel researchers are exploring methods of transferring the technology to Intel's high-volume production lines.

They expect the first BBUL-packaged chips to be on the market by 2005 or 2006.